#ifndef _CHIP_S3811_H_
#define _CHIP_S3811_H_

#define GPIO_REG                    0xb8000430  //gpio0 ~ gpio31
#define GPIOA_REG                   0xb8000434  //gpio32 ~ gpio63
#define GPIOB_REG                   0xb8000438  //gpio64 ~ gpio95
#define GPIOC_REG                   0xb800043c  //gpio96 ~ gpio127
#define GPIOD_REG                   0xb8000440  //gpio128 ~ gpio136

#define PIM_MUX_BASE                0xb8000000
#define PIN_MUX_REG_MASK            0xff000000
#define PIN_MUX_REG_SHIFT           24
#define PIN_BIT_HEIGHT_MASK         0x0000ff00
#define PIN_BIT_LOW_MASK            0x000000ff
#define PIN_BIT_HEIGHT_SHIFT        8
#define PIN_BIT_LOW_SHIFT           0
#define PIN_MUX_88H                 (0x88 << PIN_MUX_REG_SHIFT)
#define PIN_MUX_8CH                 (0x8c << PIN_MUX_REG_SHIFT)
#define PIN_MUX_A8H                 (0xa8 << PIN_MUX_REG_SHIFT)
#define PIN_MUX_ACH                 (0xac << PIN_MUX_REG_SHIFT)
    
// Reg addr | reserved | end bit:bit_num<<8(bit8~15) | start bit:bit_num<<0(bit0~7)
#define RMII_INTERRUPT_SEL              (PIN_MUX_88H | 31)                      //pin205        
#define RMII_SEL                        (PIN_MUX_88H | 30)                      //pin202 ~ pin204 pin206 ~ pin210 pin212 pin213
#define RMII_CLK_SEL                    (PIN_MUX_88H | 28)
#define RMII_MDIO_SEL                   (PIN_MUX_88H | 27)                      //pin155 pin156 
#define I2S_OUTPUT_2_DATA_SEL           (PIN_MUX_88H | 19)     
#define I2S_OUTPUT_SEL                  (PIN_MUX_88H | 18)     
#define I2SI_SEL                        (PIN_MUX_88H | 17)                     
#define SFLASH_SQL_SEL                  (PIN_MUX_88H | 16)                     
#define XTUN_AGC_PDM_SEL                (PIN_MUX_88H | 10)                     
#define XIF_AGC_PDM_SEL                 (PIN_MUX_88H | 9)                     
#define AGC_ADC_IP_SEL                  (PIN_MUX_88H | 8)                     
#define SPDIF_SEL                       (PIN_MUX_88H | 7)                     
#define HDMI_CEC_SEL                    (PIN_MUX_88H | 6) 
#define SMC2_SEL                        (PIN_MUX_88H | 5) 
#define SMC_SEL                         (PIN_MUX_88H | 4) 
#define I2C_SEL                         (PIN_MUX_88H | 3) 
#define I2C2_SEL                       (PIN_MUX_88H | 2)
#define UART_SEL                        (PIN_MUX_88H |1<<8|0)                 

#define TEST_PIN_SEL                    (PIN_MUX_8CH | 24)
#define NAND_FLASH_SEL                  (PIN_MUX_8CH | 23)
#define VIDEO_OUTPUT_Y_SEL              (PIN_MUX_8CH | 22)
#define VIDEO_OUTPUT_CLK_SEL            (PIN_MUX_8CH | 21)
#define VIDEO_OUTPUT_SYNC_SEL           (PIN_MUX_8CH | 20)
#define VIDEO_OUTPUT_ACTIVE_SEL         (PIN_MUX_8CH | 19)
#define VIDEO_OUTPUT_Cb_SEL             (PIN_MUX_8CH | 18)
#define VIDEO_OUTPUT_Cr_SEL             (PIN_MUX_8CH | 17)
#define VIDEO_INPUT_SEL                 (PIN_MUX_8CH | 16)

#define ASSI2_ERR_SEL                   (PIN_MUX_8CH | 10)
#define ASSI2_SEL                       (PIN_MUX_8CH | 9)
#define ASSI_ERR_SEL                    (PIN_MUX_8CH | 6)
#define ASSI_SEL                        (PIN_MUX_8CH | 5)
#define TSSI2_SEL                       (PIN_MUX_8CH | 8)
#define TSSI_SEL                        (PIN_MUX_8CH | 4)
#define TSPI_INVERT_SEL                 (PIN_MUX_8CH | 2)
#define TSPI_ERR_SEL                    (PIN_MUX_8CH | 1)
#define TSPI_SEL                        (PIN_MUX_8CH | 0)


#endif

